【新智元】丛京生院士深度解读可定制计算的设计自动化:自动将代码转换成电路描述,解决开发人员最大难题( 六 )


【新智元】丛京生院士深度解读可定制计算的设计自动化:自动将代码转换成电路描述,解决开发人员最大难题
本文插图
参考资料:[1] 主旨报告幻灯片:https://ucla.app.box.com/s/l2l1158ze86h38xj5sglgkcrjqz12cxg[2] 峰科计算:www.falconcomputing.com[3] J. Cong and D. Xu. Exploiting Signal Flow and Logic Dependency in Standard Cell Placement. Proc. Asia and South Pacific Design Automation Conf., Chiba, Japan, pp. 399-404, August 1995.[4] J. Cong, and Y. Zhang. Thermal-Driven Multilevel Routing for 3-D ICs. Proceedings of the Asia South Pacific Design Automation Conference, pp.121-126, January 2005.[5] J. Cong, G. Luo, J. Wei, and Y. Zhang. Thermal-Aware 3D IC Placement via Transformation. Proceedings of the 12th Asia and South Pacific Design Automation Conference (ASP-DAC 2007), Yokohama, Japan, pp. 780-785, January 2007.[6] P. Schaumont and I. Verbauwhede, "Domain-specific codesign for embedded security," in Computer, vol. 36, no. 4, pp. 68-74, April 2003.[7] R. Hameed, W. Qadeer, M. Wachs, O. Azizi, A. Solomatnikov, B. Lee, S. Richardson, C. Kozyrakis, and M. Horowitz, “Understanding sources of inefficiency in general-purpose chips,” In Proceedings of the 37th annual international symposium on Computer architecture (ISCA ’10). Association for Computing Machinery, New York, NY, USA, 37–47. [8] Jason Cong, Mohammad Ali Ghodrat, Michael Gill, Beayna Grigorian, Karthik Gururaj, Glenn Reinman. Accelerator-Rich Architectures: Opportunities and Progresses. Design Automation Conference (DAC 2014).[9] Young-kyu Choi, Jason Cong, Zhenman Fang, Yuchen Hao, Glenn Reinman, and Peng Wei. A Quantitative Analysis on Microarchitectures of Modern CPU-FPGA Platforms. Proceedings of the 53rd Annual Design Automation Conference (DAC 2016), Austin, TX, June 5-9, 2016.[10] J. Cong, B. Liu, S. Neuendorffer, J. Noguera, K. Vissers and Z. Zhang. High-Level Synthesis for FPGAs: From Prototyping to Deployment. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume 30, Number 4, pp. 473-491, April 2011.[11] Jason Cong, Jie Wang. PolySA: Polyhedral-Based Systolic Array Auto-Compilation. Proceedings of the IEEE/ACM International Conference Computer Aided Design (ICCAD), November 2018.[12] Xuechao Wei, Cody Hao Yu, Peng Zhang, Youxiang Chen, Yuxin Wang, Han Hu, Yun Liang, and Jason Cong. Automated Systolic Array Architecture Synthesis for High Throughput CNN Inference on FPGAs. Proceedings of the 54rd Annual Design Automation Conference (DAC 2017), Austin, TX, June 18-22, 2017.[13] Xuechao Wei, Yun Liang, Xiuhong Li, Cody Hao Yu, Peng Zhang, and Jason Cong . TGPA: Tile-Grained Pipeline Architecture for Low Latency CNN Inference. Proceedings of the IEEE/ACM International Conference Computer Aided Design (ICCAD), November 2018.[14] Jiaxi Zhang, Wentai Zhang, Guojie Luo, Xuechao Wei, Yun Liang, and Jason Cong. Frequency Improvement of Systolic Array-Based CNNs on FPGAs. The 2019 IEEE International Symposium on Circuits and Systems, to be held in Sapporo, Japan from May 26-29, 2019.[15] Yuze Chi, Jason Cong, Peng Wei, and Peipei Zhou. SODA: Stencil with Optimized Dataflow Architecture. Proceedings of the IEEE/ACM International Conference Computer Aided Design (ICCAD), November 2018 (Best Paper Nominee).[16] Jason Cong, Peng Wei, Cody Hao Yu, Peng Zhang. Automated Accelerator Generation and Optimization with Composable, Parallel and Pipeline Architecture. Proceedings of the 55rd Annual Design Automation Conference (DAC), San Francisco, CA, June 24-28, 2018.[17] Jason Cong, Zhenman Fang, Muhuan Huang, Peng Wei, Di Wu, and Cody Hao Yu. Customizable Computing—From Single Chip to Datacenters. Proceedings of the IEEE, Volume 107, Issue 1, pp. 185-203, January 2019.[18] Y. Choi and J. Cong. HLS-Based Optimization and Design Space Exploration for Applications with Variable Loop Bounds. Proceedings of the IEEE/ACM International Conference Computer Aided Design (ICCAD), November 2018.[19] Yi-Hsiang Lai, Yuze Chi, Yuwei Hu, Jie Wang, Cody Hao Yu, Yuan Zhou, Jason Cong, and Zhiru Zhang. HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Reconfigurable Computing. The 27th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays held in Seaside, CA, February 24-26, 2019.[20] Jason Lau, Aishwarya Sivaraman, Qian Zhang, Muhammad Ali Gulzar, Jason Cong, Miryung Kim. HeteroRefactor: Refactoring for Heterogeneous Computing with FPGA. Proceedings of 42nd International Conference on Software Engineering, to be held in Seoul, Republic of Korea, May 23–29, 2020.[21] Jiajie Li, Yuze Chi, Yuwei Hu, and Jason Cong. HeteroHalide: From Image Processing DSL to Efficient FPGA Acceleration. The 28th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays held in Seaside, CA, February 23-25, 2020.